ASML and TSMC Lead Shift to 12-Inch Photomasks for High-NA EUV

ASML and TSMC have launched an industry-wide collaboration to transition from 6-inch to 12-inch photomasks for High-NA EUV lithography. The move is designed to remove critical production bottlenecks as the semiconductor industry pushes toward denser, more complex chip architectures.

The initiative establishes a roadmap to deploy a 12-inch mask pilot line by 2031, with fully production-ready lithography systems expected by 2033. While led by the Dutch equipment maker and the Taiwanese foundry, the transition has already garnered support from Samsung Electronics and Intel Foundry.

The Stitching Bottleneck

High-NA (Numerical Aperture) EUV is the latest evolution in lithography, allowing manufacturers to print finer features on silicon. However, to maintain compatibility with existing 6-inch masks, ASML utilized anamorphic optics—applying a 4x reduction on one axis and 8x on the other. This technical compromise effectively halved the exposure field size.

Because the exposure field is reduced, large chips cannot be printed in a single pass. Instead, they must be printed in two separate parts and "stitched" together. This process increases manufacturing complexity and lowers overall fab productivity, creating a ceiling for how efficiently the largest chips can be produced.

Implications for AI and Scaling

As the demand for AI accelerates, the industry is seeing a surge in larger, more complex transistor architectures. The current stitching workaround is becoming a significant bottleneck for these high-performance designs. By moving to 12-inch masks, manufacturers can restore the full exposure field, eliminating the need for stitching and significantly increasing throughput.

Industry analysts have compared this shift to the historical transition from 200mm to 300mm wafers, suggesting it will be a foundational change in how the most advanced chips are fabricated. The result will be higher productivity and lower costs for the most advanced nodes.

The Road to 2033

While the 12-inch transition is a long-term goal, chipmakers are already integrating High-NA technology into their roadmaps. Samsung Electronics, for instance, plans to introduce High-NA EUV into high-volume DRAM manufacturing by 2028.

The industry will now watch for the development of the 2031 pilot line to see if the transition can meet the aggressive scaling needs of the next decade. This shift represents a critical pivot in the lithography ecosystem, ensuring that the physical limits of mask size do not hinder the computational ambitions of the AI era.