ASML and TSMC Lead Shift to 12-Inch Photomasks for High-NA EUV
Industry giants partner to double mask sizes by 2033, eliminating stitching constraints to boost productivity for next-gen AI chips.
ASML and TSMC have launched a joint industry-wide initiative to transition from 6-inch to 12-inch photomasks for High-NA Extreme Ultraviolet (EUV) lithography. This strategic shift aims to remove critical productivity bottlenecks and technical constraints currently hindering the mass production of the world's smallest, densest chips.
The partnership, supported by Intel Foundry and Samsung Electronics, establishes a rigorous timeline for the transition. The group targets an operational 12-inch mask pilot line by 2031, with full production readiness expected by 2033. This coordinated effort ensures that the entire ecosystem—from equipment manufacturers to foundries—moves in lockstep to support the next generation of semiconductor scaling.
The Technical Hurdle
High-NA EUV succeeds standard EUV lithography to enable smaller process nodes. However, first-generation machines utilize anamorphic optics, which apply a 4x reduction in one axis and an 8x reduction in the other. While this design maintains compatibility with existing 6-inch masks, it effectively halves the exposure field size in one dimension.
This reduced field creates a significant manufacturing challenge known as "stitching." When a chip design exceeds the halved exposure field, engineers must pattern the die in multiple sections and stitch them together. This process increases manufacturing complexity, introduces potential points of failure, and reduces overall fab productivity.
Why the Transition Matters
Industry experts view the move to 12-inch masks as a fundamental shift comparable to the historical transition from 200mm to 300mm wafers. By doubling the mask size, chipmakers can restore the full exposure field, entirely removing the need for reticle stitching. This is essential for the economic mass production of advanced AI chips and high-performance computing hardware, where die sizes are often large and precision is paramount.
Beyond technical gains, the transition should lower long-term manufacturing costs by increasing the number of chips processed per hour. The adoption of High-NA EUV will increase progressively, starting with 6-inch masks before moving to the 12-inch standard.
The Road Ahead
While the 12-inch standard is the long-term goal, companies are pursuing immediate milestones. Intel Foundry is currently focused on the near-term enablement of High-NA using 6-inch masks, regardless of whether stitching is required, as a bridge to the larger format. Meanwhile, Samsung plans to integrate High-NA EUV into high-volume DRAM manufacturing by 2028.
The industry will now monitor the deployment of early High-NA tools and the development of the specialized infrastructure required to handle and inspect 12-inch masks by the 2031 pilot deadline.