ASML Secures TSMC and Samsung Commitments for High NA EUV Adoption

ASML has secured commitments from TSMC and Samsung to adopt its next-generation High NA EUV lithography machines. The move comes as the semiconductor industry struggles to keep pace with the surging demand for advanced AI accelerators.

Under the new agreements, Samsung plans to implement High NA EUV for high-volume memory manufacturing by 2028. TSMC will follow with a target for high-volume manufacturing starting in 2030. In a coordinated effort to boost efficiency, TSMC, Samsung, and Intel have also agreed to transition from 6-inch to 12-inch photomasks. This shift to larger masks is expected to increase the throughput of High NA machines by approximately 40%.

The High-Stakes Transition

ASML remains the sole global provider of EUV lithography equipment, making it the indispensable gatekeeper for the world's most advanced semiconductors. While Intel has already taken delivery of High NA machines, TSMC previously maintained a cautious stance. This hesitation was largely driven by the extreme cost of the hardware—approximately $400 million per machine—which created a high economic bar relative to immediate productivity gains.

However, the technical requirements of AI chips are forcing a shift in strategy. "TSMC has always believed in the power of collaboration to overcome technical barriers before they become economic barriers for the semiconductor industry," said TSMC CEO C.C. Wei.

Scaling the AI Bottleneck

This coordinated adoption of High NA EUV and larger photomasks addresses a critical bottleneck in chip fabrication. By increasing throughput and enabling more complex chip designs without relying exclusively on vertical stacking, the industry can scale the production of high-performance AI chips more efficiently.

Marco Pieters, CTO of ASML, described the transition as a "huge opportunity" that represents a "significant step in productivity." For the broader market, this means a more reliable pipeline for the hardware required to train and deploy next-generation large language models and AI agents.

The Road to 2030

While the commitments are firm, the rollout will be staggered. Samsung's earlier 2028 target for memory reflects the urgent need for high-bandwidth memory (HBM) in AI clusters. TSMC's 2030 timeline suggests a more measured integration into its logic chip workflows.

Industry observers will now watch for the deployment of pilot lines and the actual realization of the 40% throughput increase. While the transition to 12-inch masks is agreed upon, the exact timeline for full-scale production remains a key variable in the industry's race to maintain Moore's Law in the AI era.