ASU Pivots to Modular Chiplet Architecture to Bypass Scaling Limits
Arizona State University is shifting from traditional transistor shrinking to advanced packaging to overcome the physical and economic ceilings of chip design.
The semiconductor industry is moving away from the decades-long pursuit of shrinking transistors on a single piece of silicon to embrace a modular approach known as advanced packaging. This transition, spearheaded by initiatives at Arizona State University, marks a fundamental shift in how computer chips are designed and manufactured to sustain performance gains.
Rather than relying on monolithic chip design, the new strategy utilizes "chiplets"—specialized components for memory, logic, and power that are manufactured separately and then integrated into a single package. According to Jason Conrad, COO of ASU’s Southwest Advanced Prototyping Hub, this allows engineers to separate different functions into distinct chiplets rather than asking one chip to perform every task. This modularity is designed to optimize size, weight, power consumption, and overall production costs.
The End of Traditional Scaling
For decades, the primary driver of computing power was the relentless shrinking of transistors, a trend that allowed more processing power to fit into smaller spaces. However, the industry is now hitting the physical and economic ceilings of this approach. As transistors reach atomic scales, the cost of production rises while the performance benefits diminish, forcing a pivot toward how chips are assembled and integrated rather than just how small they can be made.
Industrial and Economic Impact
This architectural shift allows for greater energy efficiency and performance by optimizing each chiplet for its specific function. By moving away from the "all-in-one" monolithic model, manufacturers can reduce waste and accelerate the development cycle of new hardware. Furthermore, this transition is central to strengthening the domestic U.S. semiconductor ecosystem. By integrating research and industrial manufacturing in hubs like Arizona, the U.S. aims to secure its supply chain and hardware innovation pipeline.
Bridging the Production Gap
To accelerate this transition, ASU is utilizing MacroTechnology Works—a former Motorola semiconductor fabrication site—to serve as a critical link between laboratory research and commercial production. This facility, alongside the ASU-led Southwest Advanced Prototyping (SWAP) Hub, provides the infrastructure necessary to move advanced packaging from theoretical models to scalable industrial applications. The focus remains on creating a sustainable pipeline where microelectronics research can be rapidly prototyped and deployed into the global market.