Huawei Unveils LogicFolding Architecture to Bypass US Chip Sanctions

Huawei has introduced a new chip architecture called "LogicFolding," a strategic pivot designed to maintain performance gains despite US export controls on advanced semiconductor equipment. By shifting away from traditional transistor shrinking, the company aims to sustain hardware evolution using architectural scaling.

Unveiled by semiconductor chief He Tingbo at an IEEE conference in Shanghai, LogicFolding utilizes hybrid bonding to stack two active layers face-to-face. This vertical distribution of digital, analog, and memory circuits shortens signal paths and increases overall density. Huawei claims this approach delivers a 55% increase in transistor density and a 41% improvement in power efficiency. The technology is expected to make its commercial debut in the Kirin 9050 chip, slated for the upcoming Mate 90 smartphone series.

The Tau Scaling Law

This shift is part of a broader framework Huawei calls the "Tau (τ) Scaling Law." For decades, the industry has followed Moore's Law, which relies on shrinking components to increase power. However, US sanctions have blocked Huawei from acquiring extreme ultraviolet (EUV) lithography machines from ASML, the only tools capable of printing transistors below 7nm.

Unable to shrink components further, Huawei is instead "folding" the chip. By relying on SMIC's existing process nodes and advanced packaging, the company intends to achieve chip density equivalent to 1.4nm by 2031 without ever utilizing EUV lithography.

Industry Implications

If LogicFolding proves viable at scale, it could neutralize the primary impact of US semiconductor sanctions by proving that high-performance AI and mobile processors can be produced without the world's most advanced lithography tools. Such a breakthrough would decouple high-end chip production from a single point of failure in the global supply chain.

However, the architecture faces significant technical headwinds. Stacking active layers creates immense challenges in thermal management, as heat can become trapped between the bonded layers. Additionally, Huawei must overcome hurdles regarding manufacturing yield and the current lack of domestic 3D electronic design automation (EDA) software required to design such complex vertical structures.

What to Watch

The immediate test for LogicFolding will be the performance and thermal stability of the Kirin 9050 in real-world Mate 90 devices. Industry analysts will be looking for evidence of whether the claimed density gains translate into actual processing speed or if thermal throttling limits the architecture's potential. Furthermore, the company's ability to scale this process across millions of units without prohibitive defect rates remains unconfirmed.