Commercial RISC-V Processors Vulnerable to Spectre Attacks, Research Finds

Researchers from the CISPA Helmholtz Center for Information Security and KU Leuven have demonstrated that several commercially available out-of-order RISC-V processors are susceptible to major Spectre variants. The findings, presented at the 35th Usenix Security Symposium, debunk the assumption that the relative simplicity of the RISC-V architecture provides inherent protection against speculative execution attacks.

The study identified critical vulnerabilities in high-performance silicon, specifically naming the SiFive P550 and the T-Head Xuantie C910 and C920. Using proof-of-concept attacks including Spectre-PHT, Spectre-BTB, Spectre-RSB, and Spectre-STL, the team achieved over 97% precision in their exploits. In one demonstration on the Xuantie C910, the researchers successfully leaked Linux kernel memory at a rate of 338 bytes per second. Conversely, the researchers found that in-order RISC-V processors, such as the SiFive U74 and Xuantie C906/C908, do not appear to be vulnerable to these specific attacks.

The Speculation Gap

Spectre is a class of hardware vulnerabilities first uncovered in 2018. These attacks exploit "speculative execution," a performance-boosting feature where a CPU predicts the path of future instructions to speed up processing. While established x86 (Intel/AMD) and ARM architectures have spent years deploying complex hardware and software mitigations to close these gaps, RISC-V is a newer, open-standard architecture.

As RISC-V evolves to compete with established chips, it has shifted toward high-performance "out-of-order" execution. This transition means the architecture is inheriting the same microarchitectural risks as its predecessors. The research indicates that RISC-V inherits the software and threat model of mature architectures without their accumulated hardening.

Industry Implications

This research proves that the pursuit of high-performance RISC-V silicon brings the same critical security liabilities found in proprietary architectures. The vulnerability is particularly challenging because the RISC-V ecosystem is highly diverse and currently lacks standardized introspection interfaces. This fragmentation suggests that a "one size fits all" software patch is unlikely to be effective across the entire ecosystem.

To avoid a decade of inefficient, fragmented patching, the industry must now prioritize building fundamental architectural primitives and hardware transparency directly into the RISC-V standard. Without these standardized defenses, the ecosystem risks a perpetual "cat-and-mouse" game between attackers and chip designers.

Path to Remediation

Immediate efforts to secure the ecosystem are already underway. Three patches based on the researchers' findings have already been merged into the mainline Linux kernel to mitigate some of the identified risks. Moving forward, the industry will be watching for more comprehensive hardware-level fixes and the implementation of standardized speculation barriers to protect the next generation of open-standard silicon.