Huawei Scientist Warns Nvidia and Western Chipmakers Are Hitting Physical Scaling Limits

Liao Heng, Huawei's chief semiconductor scientist, has warned that Western chipmakers—specifically Nvidia—are approaching the physical limits of their current hardware scaling strategies. The warning suggests that the industry's primary method of increasing performance is no longer sustainable.

During a rare public appearance, Liao argued that the prevailing reliance on increasing compute die size, transistor density, and high-bandwidth memory (HBM) is nearing a critical threshold. He predicted that once these physical limits are crossed, the industry will face an "avalanche," suggesting a systemic failure of the current scaling model. To counter this, Liao stated that designers must prioritize architectural complexity to reduce the consumption of compute resources.

A Shift in Scaling Philosophy

In response to these constraints, Huawei is promoting a new framework called the "Tau Scaling Law." Unlike traditional scaling, which focuses on the continuous shrinking and densifying of integrated circuits, the Tau Scaling Law shifts the priority toward improving electrical signal transmission speeds between system components.

Complementing this approach is a technology Huawei calls "LogicFolding." This method involves distributing and stacking critical logic circuits across multiple layers. By rearranging the physical layout of the logic, Huawei aims to reduce data transmission delays and increase effective density without relying solely on smaller process nodes.

Strategic Necessity

These architectural pivots are driven largely by geopolitical necessity. Severe U.S. sanctions have blocked Huawei's access to advanced lithography equipment, such as the extreme ultraviolet (EUV) machines produced by ASML. While competitors like TSMC, Intel, and Samsung continue to push the boundaries of process-node shrinking, Huawei has been forced to seek workarounds that prioritize architectural innovation over raw manufacturing precision.

Liao pointed to the success of DeepSeek as a pertinent example, noting that high AI performance can be achieved with limited computing resources through smarter architectural choices rather than sheer hardware scale.

The Path Forward

If the Tau Scaling Law and LogicFolding prove viable, it could signal a paradigm shift in semiconductor design. Success would mean that architectural efficiency and signal speed, rather than raw transistor density, become the primary drivers of chip performance. Such a shift would allow China to narrow the performance gap with Western rivals despite lacking the world's most advanced manufacturing hardware.

Huawei plans to release a new smartphone chip utilizing this framework in the near future. The industry is now waiting for the hardware to arrive, as it will be subject to rigorous teardowns and analysis by semiconductor research firms including SemiAnalysis and TechInsights.