NYCU and TSMC Engineer 0.42nm Atomic Interface for 2D Transistors
A new aluminum oxide buffer layer resolves a critical bottleneck for molybdenum disulfide semiconductors, offering a scalable path beyond silicon.
Researchers from National Yang Ming Chiao Tung University (NYCU) and TSMC Corporate Research have engineered an atomic interface just 0.42 nanometers thick to resolve a primary bottleneck in 2D transistors. This breakthrough enables high-performance electrical control in atomically thin electronics, moving the industry closer to viable alternatives to silicon.
The team utilized a monolayer of molybdenum disulfide (MoS2) as the semiconductor material. To optimize the device, they developed a process of depositing an epitaxial aluminum layer onto the MoS2, which was then oxidized to create a precise 0.42-nanometer aluminum oxide buffer layer. This engineered interface improves the quality of the insulating layer, allowing for strong gate control without hindering the flow of electrons—a balance that has historically been difficult to maintain in 2D materials.
The Silicon Limit
As traditional silicon transistors approach their fundamental physical limits, the industry has pivoted toward 2D semiconductors like MoS2. While these materials are promising due to their extreme thinness, they frequently suffer from poor interfaces with gate dielectrics. These defects typically lead to high electrical resistance or inadequate control over the transistor's switching state, which has stalled the commercial viability of 2D chips.
A New Design Paradigm
This development shifts the focus from the semiconductor material itself to the boundary where materials meet. By solving the interface problem, the research provides a scalable method for producing ultra-small, energy-efficient computing hardware. "Our research shows that the atomic interface between materials can be just as important [as the semiconductor materials themselves]," said Wen-Hao Chang, a corresponding author from NYCU.
Future Implications
By enabling high-performance, atomically thin transistors, this interface engineering opens a new path for the next generation of semiconductors. The ability to maintain electrical integrity at a sub-nanometer scale suggests that 2D chips could eventually replace or augment silicon in high-density computing. Future efforts will likely focus on whether this interface technique can be replicated across other 2D materials to further diversify the hardware landscape.