SK hynix and SanDisk Debut High Bandwidth Flash Standard to Bridge AI Memory Gap
A new open standard for HBF aims to eliminate AI bottlenecks by placing high-capacity NAND storage between HBM and SSDs.
SK hynix and SanDisk have unveiled the first standard specifications for High Bandwidth Flash (HBF), a new memory tier designed to alleviate critical data bottlenecks in AI systems. Introduced at FMS 2026, the technology creates a high-speed bridge between high-bandwidth memory (HBM) and traditional solid-state drives (SSDs).
The HBF specification, released as an open standard through the Open Compute Project (OCP), leverages NAND technology to provide high-capacity storage with rapid data transfer capabilities. According to the technical specifications, HBF supports capacities up to 512GB, utilizing 8-high and 16-high NAND stack configurations. Performance is divided into three distinct bandwidth grades, delivering speeds ranging from approximately 0.4 TB/s to 3.0 TB/s. To ensure seamless integration with CPUs and GPUs, the technology employs the Universal Chiplet Interconnect Express (UCIe) open standard for high-speed interconnection. The standardization effort includes key industry partners such as Google and Tenstorrent.
Addressing the Memory Wall
This development arrives as AI inference demands surge, creating a phenomenon known as the "memory wall." Current hardware architectures are forced to choose between the extreme speed but high cost and low capacity of HBM, or the massive capacity but sluggish speed of NVMe SSDs. HBF is positioned as a "Tiered Memory" solution, allowing AI systems to handle significantly larger datasets more efficiently without the prohibitive expense of scaling HBM alone.
Implications for AI Infrastructure
By allowing GPUs to access near-memory storage at speeds that far exceed traditional SSDs, HBF could fundamentally alter AI hardware architecture. The combination of UCIe chiplet integration and NAND density is expected to reduce the total cost of ownership for AI infrastructure. This shift is particularly critical for the scaling of "Agentic AI" systems, which require massive context windows and the ability to process vast amounts of data in real-time.
The Path to Adoption
Kim Chun-sung, SK hynix Executive Vice President and Head of Solution Development, stated that through HBF, the company intends to expand the boundaries between memory and storage to enhance overall system efficiency. While the technical specifications are now public via the OCP, the industry will be watching for the first physical implementations and the rate at which chip designers integrate the UCIe-based HBF tier into next-generation AI accelerators.