NTU Team Maps 2D Transistor Electron Transfer via Operando XSTM
A new atomic-scale characterization technique reveals the precise carrier transfer lengths in active 2D semiconductors.
A research team led by Professor Ya-Ping Chiu at National Taiwan University (NTU) has developed a breakthrough characterization method that allows engineers to observe electron behavior inside active transistors at an atomic scale. The technique, known as Operando Cross-sectional Scanning Tunneling Microscopy (Operando XSTM), provides a direct window into the metal-semiconductor interface while a device is powered, solving a long-standing visibility problem in semiconductor physics.
Developed in collaboration with the National University of Singapore (NUS) and National Taiwan Normal University (NTNU), the method achieves sub-nanometre spatial resolution. According to findings published in the journal Nature on July 1, 2026, the team used Operando XSTM to measure a carrier transfer length of approximately 2 nm in monolayer molybdenum disulfide (MoS₂) transistors utilizing bismuth contacts. This precision allows researchers to probe exactly how electrons move from metal leads into the semiconductor channel during operation.
The Scaling Bottleneck
As traditional silicon-based transistors approach their physical scaling limits, the industry has turned toward two-dimensional (2D) materials like MoS₂. These materials are prized for their potential to enable higher device density and lower power consumption. However, a critical bottleneck in the transition to post-silicon channels is the contact interface. Until now, understanding the precise distance over which carriers transfer from the metal lead into the 2D semiconductor—the transfer length—was largely theoretical or based on indirect measurements.
Implications for Moore's Law
Directly measuring this transfer length is essential for the continued scaling of transistors in accordance with Moore's Law. By observing these dynamics 'operando,' or during active operation, engineers can now identify the exact causes of parasitic resistance at the contact edge. This capability enables the design of more efficient contacts, which is a prerequisite for developing the next generation of high-density, energy-efficient chips required for advanced AI and mobile hardware.
Beyond 2D Materials
While the primary focus of the research was on 2D semiconductors, the team has already demonstrated the versatility of the tool. The measurement technique has been successfully extended to silicon-on-insulator (SOI) devices, suggesting that Operando XSTM could become a standard diagnostic tool for a wide array of semiconductor architectures. Future efforts will likely focus on optimizing various metal-contact combinations to further reduce transfer lengths and maximize chip performance.