Samsung Adopts TSMC-Validated Test Gear to Accelerate Silicon Photonics
The chipmaker is moving PIC wafer validation in-house using FormFactor and MPI equipment to challenge TSMC's CPO dominance.
Samsung Electronics has established an internal testing environment for silicon photonics by adopting probe stations from FormFactor and MPI. This strategic shift allows the company to move away from outsourcing validation to third parties like imec and creates an internal optimization loop for its photonic integrated circuit (PIC) development.
According to reports from The Elec, Samsung is utilizing equipment from the only two suppliers—FormFactor (US) and MPI (Taiwan)—that have passed TSMC's qualification for Co-Packaged Optics (CPO) test equipment. TSMC currently employs these same tools for its COUPE (Co-Packaged Optical Engine) platform. Samsung aims to complete its in-house testing of PIC wafers by the end of 2024, focusing on wavelength and frequency domains to optimize bandwidth, wavelength response, and optical loss.
The Path to 2027
This infrastructure upgrade is a prerequisite for Samsung's broader roadmap to launch silicon photonics foundry services by 2027. These services will provide customers with process technologies, libraries, and process design kits (PDKs). As part of this evolution, Samsung is developing an optical engine that integrates Electronic Integrated Circuits (EIC) and PICs, with specific testing for these engines scheduled for 2025. To verify high-speed data transmission, the company will introduce time-domain measurements during that phase.
To minimize connection distances, Samsung is employing hybrid bonding to vertically stack the PIC and EIC within the optical engine. The company has already demonstrated the viability of this approach, showcasing a CPO mockup at ASPS 2026 in August that featured a logic chip and optical engine integrated on a silicon interposer.
Strategic Implications
Silicon photonics is critical for the next generation of AI and high-performance computing (HPC) hardware, where traditional electrical I/O has become a bottleneck for power efficiency and data transfer. By adopting a validated test infrastructure identical to that of its primary rival, Samsung reduces technical risk and accelerates its timeline to commercialize CPO.
Choi Won-kyung, vice president of Samsung Electronics' Semiconductor R&D Center Advanced Package Lab, stated that the company plans to focus on the optical engine before expanding applications to GPUs, CPUs, and network switches. The ultimate goal is to package these optical engines with HBM and logic chips on a silicon interposer to reduce heat generation and power consumption. This positioning is viewed as a core breakthrough strategy to compete directly with TSMC's advanced packaging dominance.
Market Outlook
Samsung is already seeing early commercial traction, having secured a project from a major optical communications module company with mass production expected in the second half of this year. Looking forward, Samsung's services could attract global networking and communications semiconductor firms, such as Broadcom, who may seek a viable second source for high-performance optical interconnects by 2027.